Synopsys organises SNUG India in Bangalore
Synopsys has announced that it has hosted its 16th annual Synopsys User’s Group (SNUG™) in India to help engineers better address the productivity challenges they face when designing today’s chips and electronic systems. The conference highlighted advancements in semiconductor design and verification that can be used to design even the most complex systems on chips (SoCs). More than 3,000 Synopsys tool, IP and software users attended the two-day conference in Bangalore, making it the largest SNUG India event to date.
SNUG India 2015 featured 57 user papers with 41 presentations that discussed a wide range of technical topics relating to design exploration, low power implementation and verification, test, mixed-signal verification, emulation and FPGA prototyping. This user-driven event promotes strong engagement with other semiconductor professionals and provides a platform for sharing best practices and methodologies in the area of semiconductor design. SNUG aims to showcase user innovation and foster local user communities. In addition to creating avenues to network with other professionals, this year’s event in India featured new solutions to address the toughest design challenges engineers face as the semiconductor industry takes bold steps towards sub-10-nanometer (10nm) system-on-chips (SoCs)... See more
SNUG India 2015 featured 57 user papers with 41 presentations that discussed a wide range of technical topics relating to design exploration, low power implementation and verification, test, mixed-signal verification, emulation and FPGA prototyping. This user-driven event promotes strong engagement with other semiconductor professionals and provides a platform for sharing best practices and methodologies in the area of semiconductor design. SNUG aims to showcase user innovation and foster local user communities. In addition to creating avenues to network with other professionals, this year’s event in India featured new solutions to address the toughest design challenges engineers face as the semiconductor industry takes bold steps towards sub-10-nanometer (10nm) system-on-chips (SoCs)... See more
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